Processing at the Edge
Ground trampolines and Phase Locked Loops
A customer reported that the PLL on the UPduino low-cost Lattice iCE40 FPGA board was intermittent. The blog details the process I used to debug the issue. This work in part...
Ground trampolines and Phase Locked Loops
A customer reported that the PLL on the UPduino low-cost Lattice iCE40 FPGA board was intermittent. The blog details the process I used to debug the issue. This work in part...