The 3.1 revision of the UPduino has been updated with the following community driven changes. Thanks to the Discord users who gave this feedback:
- Fix 12MHz and Ground silkscreen bug
- Change USB filter ferrite bead to PTC to eliminate issues with burning up the ferrite bead if the 5V is shorted to ground. Please see this blog for details.
- Added a sticker to clearly indicate v 3.1 for the above changes
- Cost has gone up by $1 to account for component cost increases due to the parts shortage
The UPduino v3.1 is a small, low-cost open source FPGA board. The board features an on-board FTDI FPGA programmer, flash and 3-color LED with all FPGA pins and all FTDI pins brought out to easy to use 0.1" header pins for fast prototyping.
The tinyVision.ai UPduino v3.1 features:
- Lattice UltraPlus ICE40UP5K FPGA with 5.3K LUTs, 1Mb SPRAM, 120Kb DPRAM, 8 Multipliers
- FTDI FT232H USB programmer with all pins brought out to test points
- 39 GPIO on 0.1” headers, 5V/3.3V/Ground to supply project DC power (<200mA)
- Dedicated 12MHz oscillator
- 8MB qSPI SPI Flash
- RGB LED
- PMOD compatible
- On-board 3.3V and 1.2V Regulators
- Open source schematic and layout using KiCAD
- An RGB LED Example Project to get your started on your FPGA journey
- Improved USB footprint to minimize connectors ripping off the board.
UPduino's are fully tested and programmed with a blinking LED flash image before shipping. Included are two 16 pin 0.1" header (not soldered on to give you flexibility in mounting).
Please note that in order to optimize for shipping world wide, a micro USB cable is not included!
The main draw of the UPduino is its low cost and open-source toolchain, allowing you to experiment and learn about hardware programming. The UPduino is a great way to get started to learn about programming FPGA's as it is low cost, self-contained and you can be up and running in a few minutes. The previous UPduino had many design issues some of which are documented here. A survey sent to the community resulted in various improvement ideas that formed the basis of the design improvements. Changes/improvements to the v2.1 design are documented here.